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Layout Recommendation:
Use the following general guidelines when designing
printed circuit boards. An example of the typical
land pattern for a DFN PI2003 and SO-8/PowerPak
MOSFET is shown in Figure 14:
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It is best to connect the gate of the MOSFET to
the GATE pin of the controller with a short and
wide trace.
Connections from the SP and SN pins to the
MOSFET source and drain pins respectively
should be as short as possible
The VC bypass capacitor (C1 and C2) should be
located as close as possible to the VC and GND
pins. Place the PI2003 and VC bypass
capacitor on the same layer of the board.
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Connect all MOSFET source pins together with
a wide trace to reduce trace parasitics and to
accommodate the high current input. Similarly,
connect all MOSFET Drain pins together with a
wide trace to accommodate the high current
output.
Figure 14: PI2003 and MOSFET layout example
Figure 24: PI2003 Mounted on
Figure 25: PI2003-EVAL1 performance under an input short
PI2003-EVAL1
Please visit www.picorpower.com for information on PI2003-EVAL1
Picor Corporation ? picorpower.com
PI2003
Rev 1.1
Page 13 of 16
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